Current steering circuits based on a differential pair of bipolar or MOS transistors are well known. These circuits respond to differential inputs, that is, to the difference between two input signals. In the case where the control signal is inherently single-ended, such as with CMOS logic signals, additional circuitry is used to generate a complementary signal or to generate a reference level which must be applied to the second input of the differential pair. This increases the circuit complexity and power dissipation.
There is therefore a need for a current steering circuit which responds to a single-ended input signal without the need to generate a complementary signal or reference level. Such a circuit can be used in various applications such as Digital to Analog converters (DACs), Analog to Digital converters (ADCs), tunable analog circuits, and logic gates.
In an effort to reduce power dissipation and improve performance, the use of both CMOS and CML/ECL technology within the same integrated circuit is becoming commonplace. Consequently, in BiCMOS integrated circuits, the need arises for a CMOS signal to act as the control signal of a CML/ECL multiplexer. This is particularly true for a high-speed logic circuit having multiple modes of operation which are not to be commuted at high speed. Examples are a programmable divider and a scannable CML/ECL flip-flop for scan testing.
Typically, a CMOS to CML/ECL translator or a resistive network is required to translate the CMOS control signal to an CML/ECL format and a pure CML/ECL multiplexer circuit is used. This also results in higher complexity and power dissipation.
Thus, in BiCMOS circuits there is a need for a multiplexer circuit inherently responding to a CMOS control signal and operating on CML/ECL data signals.
In this application the term BiCMOS refers to the combination of bipolar and complementary MOS devices in the same circuit.